We’re proud to announce that AtomMiner has leveled up to impressive 150MH per second on a single core. While jumping through hoops in attempts to optimize SHA256 hardware implementation and improve mining speed we’ve moved on to the larger FPGA from Altera – Cyclone V installed on the BeMicro CV A9 kit board from Arrow. Here’s our new test board:
Having larger FPGA at our disposal we were able to improve single hashing core to perform at stunning 150Mhz putting out about 150MH/s of true bitcoin mining (read: sha256(sha256(data)) in less than 10ns). New SHA256 implementation takes up about 33% of the chip leaving us with hope to fit 2 or even 3 hashing cores there in the future. Here’s our implementation summary:
As a side note, I find some abbreviations really funny…like Logic Utilization in ALMs…for sure, hungry developers won’t do any good to the project. Even hardware though is asking for alms 🙂 Do not hesitate to donate extra BTC you might have to 3LwsJAzPd8weD1FypVWmkDFMwA7rgjPSif
Ok, back to the project. Here’s our standalone setup of our experimental Bitcoin mining machine
I really like the way it looks at night. It reminds me that Christmas is right around the corner by flashing all kind of LEDs like a Christmas Tree. The idea was to have a test bench data without having this beast connected to the development laptop all the time so we dust off old Odroid C1 SoC board and setup minimal Ubuntu on the SD card to control AtomMiner device. As of now, the whole test system consist of the following:
- Ordroid C1 board running Ubuntu 14.04 with Stratum Proxy and atomminer software
- FTDI USB-Serial for communication between AtomMiner board and host PC
- BeMicro CV A9 kit board with a single hashing core @ 150MHz
The whole system runs off of 5VDC power supply consuming roughly 3A, which gives us ~15-18Watts at the wall (better than average laptop mining cryptocurrency).
As I write, test system been running for about a week non-stop with pretty good results showing even better hashing speed on the proxy and the pool:
All this is pretty exciting and makes us move on towards new solutions and faster speed. From another hand, it feels like we’ve almost reached speed capacity of Serial interface at our speeds. Simple math shows us that data send/receive delays over UART will be comparable to actual hashing times which makes no sense in terms of this project. We’re about to roll out our own mining board with the same Cyclone V FPGA chip and full USB-3 interface support to speed up communication between host and FPGA.
